The present disclosure relates to a pixel imager and, in particular, a passive pixel read out circuit having low noise.
In legacy analog imagers, particularly infrared imagers, photo-current from a photo-detector, such as a photodiode, is stored on an integration capacitor. A well or integration capacitor is connected between the photodiode and a reference voltage, and then once per video frame, the voltage or charge of the well capacitor is transferred to a down-stream analog-to-digital converter (ADC), where the voltage is converted to a binary value.
There are different ways to control the flow of photo-current to the integration capacitor. For example, a direct injection (DI) transistor can control the flow of current from the photodiode transistor into the integration capacitor. The gate of the DI transistor is connected to a bias voltage. The level of this voltage can be selected by the skilled artisan and is used, in part, to keep the photodiode in reverse bias.
Current pixels read out analog voltages stored on the integration capacitor into column wires. There are two types of readout; active and passive.
An active readout will typically include a source follower (SF) transistor (SF buffer) inside the pixel to buffer voltages to a column line. In operation, the voltage buffered into the column line is directly sampled on a column capacitor at the column circuit. The length of the SF transistor drives the noise floor (1/f noise) and the width drives the settling time from selection onto the column line and the column capacitor.
As pixels shrink, noise floors decrease and readout rates increase, the area needed for the SF becomes relatively larger—reducing the area available for providing the integration capacitor. This reduced area, thus, reduces the full well of the pixel and can increase the signal to noise ratio of the pixel.
In contrast, a passive read out circuit such as a capacitance transimpedance amplifier (CTIA) requires only a minimum sized switch to directly connect the integration capacitor to the column wire. That is, the SF buffer is omitted and a larger full well can be created. Charge dumped into the column wire is amplified through a column level CTIA that includes an active amplifier to convert this charge to a voltage before it can be sampled onto a capacitor. Passive pixel readout traditionally suffers one major issue; parasitic capacitances on the column wire increases the noise gain of the amplifier in the CTIA. The increased noise eventually led to the abandonment of passive readout circuits in favor of active readout circuits.